ISCAS

IEEE ISCAS paper using IEEEtran. Two-column, circuit design and measurement sections.

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Conference

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Free to use (MIT)

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iscas/main.tex

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\documentclass[conference,a4paper]{IEEEtran}
\IEEEoverridecommandlockouts
\usepackage{cite}
\usepackage{amsmath,amssymb}
\usepackage{graphicx}
\usepackage{booktabs}
\usepackage{hyperref}

\begin{document}

\title{A 0.9-V, 24-GHz Low-Noise Amplifier in 22-nm FinFET\\
       with Integrated Input Matching Network}

\author{\IEEEauthorblockN{First Last, Jane Doe, John Smith}
\IEEEauthorblockA{\textit{University of Example}\\
\{you, jane, john\}@example.com}}
\maketitle

\begin{abstract}
We present a 24-GHz low-noise amplifier (LNA) in 22-nm FinFET operating
from 0.9 V. The LNA integrates an on-chip transformer-based Balun
matching network, achieving a noise figure of 2.1 dB and gain of 18.3
dB while consuming 6.4 mW in 0.09 mm$^2$ active area.
\end{abstract}

\begin{IEEEkeywords}
low-noise amplifier, FinFET, 24 GHz, input matching
\end{IEEEkeywords}

\section{Introduction}
Emerging 5G and radar applications demand compact, low-power, low-noise
amplifiers at mm-wave frequencies.

\section{Circuit Design}
The LNA uses a common-source cascode topology with transformer-based
input matching. The balun provides single-ended-to-differential
conversion and inductive gain boosting:
\begin{equation}
Z_\mathrm{in} = R_s + j \omega L_g + \frac{1}{j \omega C_{gs}}.
\end{equation}

\section{Measurement Results}
\begin{table}[t]
\centering\small
\begin{tabular}{lc}
\toprule
Parameter & Value \\
\midrule
Frequency            & 24.0 GHz \\
Supply               & 0.9 V \\
Gain                 & 18.3 dB \\
NF                   & 2.1 dB \\
IIP3                 & $-$6.5 dBm \\
Power consumption    & 6.4 mW \\
Active area          & 0.09 mm$^2$ \\
\bottomrule
\end{tabular}
\end{table}

\section{Conclusion}
A compact, low-power 24-GHz LNA with competitive noise performance
demonstrated using integrated transformer-based matching.

\bibliographystyle{IEEEtran}
\bibliography{refs}
\end{document}
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